View TS61504_1329080.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TS615
Dual Wide-Band Operational Amplifier with High Output Current
Low noise: 2.5 nV/Hz High output current: 420 mA Very low harmonic and intermodulation distortion High slew rate: 410 V/s -3 dB bandwidth: 40 MHz @ gain = 12 dB on 25 single-ended load 21.2 Vp-p differential output swing on 50 load, 12 V power supply Current feedback structure 5 V to 12 V power supply Specified for 20 and 50 differential load Power down function with short-circuited output to keep matching with the line in sleep mode
P TSSOP14 Exposed-Pad (Plastic Micropackage)
Pin Connections (top view)
Description
The TS615 is a dual operational amplifier featuring a high output current of 410 mA. This driver can be configured differentially for driving signals in telecommunication systems using multiple carriers. The TS615 is ideally suited for xDSL (High Speed Asymmetrical Digital Subscriber Line) applications. This circuit is capable of driving a 10 or 25 load on a range of power supplies: 2.5 V, 5 V, 6 V or +12 V. The TS615 is capable of reaching a -3 dB bandwidth of 40 MHz on a 25 load with a 12 dB gain. This device is designed for high slew rates and demonstrates low harmonic distortion and intermodulation. The TS615 offers a power-down function to order to decrease power consumption. During sleep mode, the device short circuits its output in order to keep the impedance matched to the line. The TS615 is housed in TSSOP14 exposed-pad plastic package for a very low thermal resistance.
-VCC1 1 Output1 2 +VCC1 3 +-+
14 -VCC2 13 Output2 12 +VCC2 11 Non Inverting Input2 10 Inverting Input2 9 NC 8 NC
Top View
Non Inverting Input1 4 Inverting Input1 5 PowerDown 6 NC 7
dice Pad
Cross Section View Showing Exposed-Pad. This pad must be connected to a (-Vcc) copper area on the PCB.
Applications
Line driver for xDSL Multiple video line driver
Order Codes
Part Number TS615IPWT Temperature Range -40, +85C Package TSSOP (Thin Shrink Outline Package) Packaging Tape & Reel Marking TS615
December 2004
Revision 2
1/36
TS615
Typical Application
1 Typical Application
Figure 1 shows a schematic of a typical xDSL application using the TS615. Figure 1. Differential line driver for xDSL applications
11 10 12
+ _
+Vcc 13 -Vcc
12.5
1/2TS615
14
Vi
R2
R1 GND R4
Vo 25 Vo
2 12.5
1:2
100
Vi
5 4
_
R3
3 +Vcc -Vcc
1/2TS615
+
6 Pw-Dwn
1
2/36
Absolute Maximum Ratings
TS615
2 Absolute Maximum Ratings
Table 1. Key parameters and their absolute maximum ratings
Symbol VCC Vid Vin Toper Tstd Tj Rthjc Rthja Pmax. ESD Supply voltage 1 Differential Input Voltage 2 Input Voltage Range Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Area Maximum Power Dissipation (@25C) CDM: Charged Device Model
3
Parameter
Value 7 2 6 -40 to + 85 -65 to +150 150 4 40 3.1 1.5 2 200 1 1 100
4
Unit V V V C C C C/W C/W W kV kV V kV kV V
except HBM: Human Body Model pins 4, 5, MM: Machine Model 10, 11 ESD CDM: Charged Device Model only pins HBM: Human Body Model 4, 5, 10, MM: Machine Model 11 Output Short Circuit
1) All voltage values, except differential voltage are with respect to network terminal. 2) Differential voltage are non-inverting input terminal with respect to the inverting input terminal. 3) The magnitude of input and output voltage must never exceed VCC +0.3V.
4) An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short circuit on amplifiers.
Table 2. Operating conditions
Symbol VCC Vicm Parameter Power Supply Voltage Common Mode Input Voltage Value 2.5 to 6 -VCC+1.5V to +VCC-1.5V Unit V V
3/36
TS615
Electrical Characteristics
3 Electrical Characteristics
Table 3. VCC = 6V, Rfb=910,Tamb = 25C (unless otherwise specified)
Symbol DC performance Vio Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio 20 log (Vcc/Vio) Total Supply Current per Operator Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. 6 7.8 3 3.2 82 54 1 15 1.25 2.1 2.5 30 3.5 mV mV Parameter Test Condition Min. Typ. Max. Unit
Vio
Iib+ IibZIN+ ZINCIN+ CMR SVR ICC
A A
k
pF dB dB 17 mA
Vic = 4.5V
Tmin. < Tamb < Tmax.
58 72
63 61 79 78 14
Vcc=2.5V to 6V
Tmin. < Tamb < Tmax. No load
Dynamic performance and output characteristics ROL Open Loop Transimpedance -3dB Bandwidth Full Power Bandwidth Gain Flatness @ 0.1dB Rise Time Fall Time Settling Time Slew Rate High Level Output Voltage Low Level Output Voltage Output Sink Current Iout Output Source Current Vout = 7Vp-p, RL = 25 Tmin. < Tamb. < Tmax. Small Signal Vout<20mVp AV = 12dB, RL = 25 Large Signal Vout=3Vp AV = 12dB, RL = 25 Small Signal Vout<20mVp AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 RL=25 Connected to GND RL=25 Connected to GND Vout = -4Vp Tmin. < Tamb < Tmax. Vout = +4Vp Tmin. < Tamb < Tmax. 330 -350 330 4.8 25 5 21 8.9 40 MHz 26 7 10.6 12.2 50 410 5.1 -5.5 -530 -440 420 365 mA -5.2 MHz ns ns ns V/s V V M
BW
Tr Tf Ts SR VOH VOL
4/36
Electrical Characteristics
Table 3. VCC = 6V, Rfb=910,Tamb = 25C (unless otherwise specified)
Symbol Noise and distortion eN iNp iNn HD2 HD3 Equivalent Input Noise Voltage Equivalent Input Noise Current (+) Equivalent Input Noise Current (-) 2nd Harmonic distortion (differential configuration) 3rd Harmonic distortion (differential configuration) 2nd Order Intermodulation Product (differential configuration) IM2 F = 100kHz F = 100kHz F = 100kHz Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. F1= 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1= 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. 3rd Order Intermodulation Product (differential configuration) IM3 F1 = 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. 2.5 15 21 -87 -83 Parameter Test Condition Min. Typ. Max.
TS615
Unit
nV/Hz pA/Hz pA/Hz dBc dBc
-76 dBc -75
-88 dBc -87
5/36
TS615
Electrical Characteristics
Table 4. VCC = 2.5V, Rfb=910,Tamb = 25C (unless otherwise specified)
Symbol DC performance Vio Input Offset Voltage Differential Input Offset Voltage Positive Input Bias Current Negative Input Bias Current Input(+) Impedance Input(-) Impedance Input(+) Capacitance Common Mode Rejection Ratio 20 log (Vic/Vio) Supply Voltage Rejection Ratio 20 log (Vcc/Vio) Total Supply Current per Operator Tamb Tmin. < Tamb < Tmax. Tamb = 25C Tamb Tmin. < Tamb < Tmax. Tamb Tmin. < Tamb < Tmax. 5 8 0.8 1.24 71 62 1.5 11 0.5 1.2 2.5 30 2.5 mV mV Parameter Test Condition Min. Typ. Max. Unit
Vio
Iib+ IibZIN+ ZINCIN+ CMR SVR ICC
A A
k
pF dB dB 15 mA
Vic = 1V
Tmin. < Tamb. < Tmax.
55 63
60 58 77 76 11.9
Vcc=2V to 2.5V
Tmin. < Tamb. < Tmax. No load
Dynamic performance and output characteristics ROL Open Loop Transimpedance -3dB Bandwidth Full Power Bandwidth Gain Flatness @ 0.1dB Rise Time Fall Time Settling Time Slew Rate High Level Output Voltage Low Level Output Voltage Output Sink Current Iout Output Source Current Vout = 2Vp-p, RL = 10 Tmin. < Tamb. < Tmax. Small Signal Vout<20mVp AV = 12dB, RL = 10 Large Signal Vout = 1.4Vp AV = 12dB, RL = 10 Small Signal Vout<20mVp AV = 12dB, RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.8Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 Vout = 2.2Vp-p, AV = 12dB RL = 10 RL=10 Connected to GND RL=10 Connected to GND Vout = -1.25Vp Tmin. < Tamb < Tmax. Vout = +1.25Vp Tmin. < Tamb < Tmax. 200 -350 100 1.5 20 2 5.4 2.1 30 MHz 20 5.7 11 11.5 39 130 1.75 -2.05 -470 -450 270 245 mA -1.8 MHz ns ns ns V/s V V M
BW
Tr Tf Ts SR VOH VOL
6/36
Electrical Characteristics
Table 4. VCC = 2.5V, Rfb=910,Tamb = 25C (unless otherwise specified)
Symbol Noise and distortion eN iNp iNn HD2 HD3 Equivalent Input Noise Voltage Equivalent Input Noise Current (+) Equivalent Input Noise Current (-) 2nd Harmonic distortion (differential configuration) 3rd Harmonic distortion (differential configuration) 2nd Order Intermodulation Product (differential configuration) IM2 F = 100kHz F = 100kHz F = 100kHz Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. Vout = 6Vp-p, AV = 12dB F= 110kHz, RL = 20 diff. F1= 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1= 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. 3rd Order Intermodulation Product (differential configuration) IM3 F1 = 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. 2.5 15 21 -97 -98 Parameter Test Condition Min. Typ. Max.
TS615
Unit
nV/Hz pA/Hz pA/Hz dBc dBc
-86 dBc -88
-90 dBc -85
Power-down mode features
The power-down command is a MOS input featuring a high input impedance. Table 5. VCC = 2.5V, 5V, 6V or 12V, Tamb = 25C
Symbol Parameter Pin (6) Threshold Voltage for Power Down Mode Vpdw Low Level High Level Iccpdw Rpdw Cpdw Power Down Mode Total Current Consumption@ VCC=5V Power Down Mode Total Current Consumption@ VCC=12V Power Down Mode Output Impedance @ VCC=5V Power Down Mode Output Impedance @ VCC=12V Power Down Mode Output Capacitance -VCC -VCC+2 69 148 19 15.3 63 -VCC+0.8 +VCC 80 180 23 19 V Min. Typ. Max. Unit
A A
pF
Power down control Vpdw=Low Level Vpdw=High Level
Circuit status Active Standby
7/36
TS615
Figure 2. Load configuration
Load: RL=25, VCC=6V
Electrical Characteristics
Figure 5. Load configuration
Load: RL=10, VCC=2.5V
+
_
+6V
50 cable 49.9
+
50
+2.5V
50 cable
TS615
-6V
25
33 1W
TS615
10
49.9
_
-2.5V
11 0.5W
50
Figure 3. Closed loop gain vs. frequency
AV=+1
2 40
Figure 6. Closed loop gain vs. frequency
AV=-1
2 -140
gain
0 -2 -4
(Vcc=6V) 20 0
gain
-160 (Vcc=2.5V) 0 -2 -4
phase
(Vcc=2.5V)
phase
(Vcc=6V)
-180 -200 -220
(gain (dB))
(gain (dB)
Phase ()
-6 -8 -10 -12 -14 -16
(Vcc=2.5V) -40 (Vcc=6V) -60 -80 (Vcc=2.5V, Rfb=1.1k, Rload=10) (Vcc=6V, Rfb=750, Rload=25) -100 -120 100 1k 10k 100k 1M 10M 100M
-6 -8 -10 -12 -14 -16
(Vcc=2.5V) (Vcc=6V)
-240 -260 (Vcc=2.5V, Rfb=1k, Rin=1k, Rload=10) (Vcc=6V, Rfb=680, Rin=680, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 4. Closed loop gain vs. frequency
AV=+2
8 40
Figure 7. Closed loop gain vs. frequency
AV=-2
8 -140
gain
6 4 2
(Vcc=6V) 20 6 4 0 2
gain
-160
phase
(Vcc=2.5V)
phase
(Vcc=2.5V) (Vcc=6V) -180 -200 -220 (Vcc=6V) -240 -260
(gain (dB))
Phase ()
0 -2 -4 -6 -8 -10
(Vcc=2.5V) (Vcc=6V)
0 -2 -4 -6 -8 -10
(Vcc=2.5V)
-40 -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M
(Vcc=2.5V, Rfb=1k, Rin=510, Rload=10) (Vcc=6V, Rfb=680, Rin=750//620, Rload=25)
-280 -300
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
8/36
Phase ()
-20
(gain (dB))
Phase ()
-20
Electrical Characteristics
Figure 8. Closed loop gain vs. frequency
AV=+4
14 40
TS615
Figure 11. Closed loop gain vs. frequency
AV=-4
14 -140
gain
12 (Vcc=2.5V) 10 8 20
gain
12 (Vcc=2.5V) 10
0
-160
phase
(Vcc=6V)
phase
(Vcc=6V)
-180 -200 -220
8
(gain (dB))
Phase ()
6 4 2 0 -2 -4
(Vcc=2.5V) (Vcc=6V)
6 4 2 0 -2
(Vcc=2.5V) (Vcc=6V)
-40 -60 -80 (Vcc=2.5V, Rfb=910, Rg=300, Rload=10) (Vcc=6V, Rfb=620, Rg=560//330, Rload=25) -100
-240 -260 (Vcc=2.5V, Rfb=1k, Rin=320//360, Rload=10) (Vcc=6V, Rfb=620, Rin=360//270, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
-4
-120 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 9. Closed loop gain vs. frequency
AV=+8
20 40
Figure 12. Closed loop gain vs. frequency
AV=-8
20 -140
gain
18 (Vcc=2.5V) 16 14 20 18 16 0 14
gain
-160 (Vcc=2.5V)
phase
(Vcc=6V)
phase
(Vcc=6V)
-180 -200 -220
(gain (dB))
Phase ()
12 10 8 6 4 2
(Vcc=2.5V) (Vcc=6V)
12 10 8 6 4
(Vcc=2.5V) (Vcc=6V)
-40 -60 -80 (Vcc=2.5V, Rfb=680, Rg=240//160, Rload=10) (Vcc=6V, Rfb=510, Rg=270//100, Rload=25) -100
-240 -260 (Vcc=2.5V, Rfb=680, Rin=160//180, Rload=10) (Vcc=6V, Rfb=510, Rin=150//110, Rload=25) -280 -300 100 1k 10k 100k 1M 10M 100M
2 -120 100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 10. Bandwidth vs. temperature: AV=+4, Rfb=910
50 Vcc=6V Load=25 45
Figure 13. Positive slew rate: AV=+4, Rfb=620,
VCC=6V, RL=25
4
2
40
Bw (MHz)
VOUT (V)
35
0
30
-2
25
Vcc=2.5V Load=10
-4 0.0
20 -40
-20
0
20
40
60
80
10.0n
20.0n
30.0n
40.0n
50.0n
Temperature (C)
Time (s)
9/36
Phase ()
-20
(gain (dB))
Phase ()
-20
(gain (dB))
TS615
Figure 14. Positive slew rate: AV=+4, Rfb=910,
VCC=2.5V, RL=10
2 4
Electrical Characteristics
Figure 17. Positive slew rate: AV= - 4, Rfb=620,
VCC=6V, RL=25
1
2
VOUT (V)
VOUT (V)
0
0
-1
-2
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
-4 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
Figure 15. Negative slew rate: AV=+4, Rfb =620,
VCC=6V, RL=25
4
Figure 18. Positive slew rate: AV= - 4, Rfb=910,
VCC=2.5V, RL=10
2
2
1
VOUT (V)
0
VOUT (V)
10.0n 20.0n 30.0n 40.0n 50.0n
0
-2
-1
-4 0.0
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
Figure 16. Negative slew rate: AV=+4, Rfb =910,
VCC=2.5V, RL=10
2
Figure 19. Negative slew rate: AV= - 4, Rfb =620,
VCC=6V, RL=25
4
1
2
VOUT (V)
0
VOUT (V)
10.0n 20.0n 30.0n 40.0n 50.0n
0
-1
-2
-2 0.0
-4 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
Time (s)
10/36
Electrical Characteristics
Figure 20. Negative slew rate: AV= - 4, Rfb=910, VCC=2.5V, RL=10
2
TS615
Figure 23. Input voltage noise level: AV=+92,
Rfb=910, Input+ connected to Gnd via 10
5.0
+
Input Voltage Noise (nV/Hz)
4.5
+ 6V - 6V 910 910
Output
_
10
4.0
VOUT (V)
0
3.5
3.0
2.5
-2 0.0
10.0n
20.0n
30.0n
40.0n
50.0n
2.0 100
1k
10k
100k
1M
Time (s)
(Frequency (Hz)
Figure 21. Slew rate vs. temperature: AV=+4, Rfb=910, VCC=2.5V, RL=10
200
Figure 24. Transimpedance vs. temperature, open loop
30
25
150
Vcc=6V
100
20
Positive SR
Slew Rate (V/s)
50 0 - 50
Negative SR
ROL (M)
15
10 Vcc=2.5V 5
- 100 - 150 - 200 - 40
- 20
0
20
40
60
80
Temperature (C)
0 -40
-20
0
20
40
60
80
Temperature (C)
Figure 22. Slew rate vs. temperature: AV=+4, Rfb=910, VCC=6V, RL=25
600 500 400 300
Figure 25. Icc vs. power supply Open loop, no load
16 14 12 10 8 6 4 Icc(+)
Slew Rate (V/s)
200
ICC (mA)
100 0 - 100 - 200 - 300 - 400 - 500 - 600 - 40
Positive&Negative SR Rfb=620
Positive&Negative SR Rfb=910
2 0 -2 -4 -6 -8 -10 -12 -14 Icc(-)
- 20
0
20
40
60
80
-16 5 6 7 8 9 10 11 12
Temperature (C)
VCC (V)
11/36
TS615
Figure 26. Iib vs. power supply Open loop, no load
7
Electrical Characteristics
Figure 29. Iib(+) vs. temperature Open loop, no load
8
6
Iib+ I+
B
7 6 5
Vcc=6V
5
Iib (A) IB
4
IIB(+) (A)
4 3 2 Vcc=2.5V 1 0
3
2
Iib-I
B
1
0 5 6 7 8 9 10 11 12
-1 -40
-20
0
20
40
60
80
Vcc (V)
Temperature (C)
Figure 27. Iib(-) vs. temperature Open loop, no load
5
Figure 30. Voh & Vol vs. power supply Open loop, RL=25
6 5
VOH
4 Vcc=6V
4 3
IIB(-) (A)
3
VOH & VOL (V)
2 1 0 -1 -2 -3
2 Vcc=2.5V 1
VOL
-4 -5
0 -40
-6
-20
0
20
40
60
80
5
6
7
8
9
10
11
12
Temperature (C)
Vcc (V)
Figure 28. Icc vs. temperature Open loop, no load
14 12 10 8 6 4 Icc(+) for Vcc=6V Icc(+) for Vcc=2.5V
Figure 31. Voh vs. temperature Open loop
6
5
4
ICC (mA)
0 -2 -4 -6 -8 -10 -12 -14 -40 -20 0 20 40 60 80 Icc(-) for Vcc=6V Icc(-) for Vcc=2.5V
VOH (V)
2
Vcc=6vV Load=25 3
2
1 Vcc=2.5V Load=10 0 -40 -20 0 20 40 60 80
Temperature (C)
Temperature (C)
12/36
Electrical Characteristics
Figure 32. Vol vs. temperature Open loop
0 Vcc=2.5V Load=10
TS615
Figure 35. CMR vs. temperature Open loop, no load
70 68 66 Vcc=6V
-1
-2
64
-3
CMR (dB)
VOL (V)
62 60 58 56 54 52 Vcc=2.5V
-4
Vcc=6V Load=25
-5
-6 -40
-20
0
20
40
60
80
50 -40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
Figure 33. Differential Vio vs. temperature Open loop, no load
450
Figure 36. SVR vs. temperature Open loop, no load
84
400 Vcc=2.5V
82
Vcc=6V
VIO (V)
SVR (dB)
Vcc=6V
350
80
300
78
250
76
200 -40
Vcc=2.5V
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
Figure 34. Vio vs. temperature Open loop, no load
2.0 Vcc=6V 1.5
Figure 37. Iout vs. temperature Open loop, VCC=6V, RL=10
300 250 200 150 100 50
Isource
VIO (mV)
Iout (mA)
1.0
0 -50 -100 -150 -200 -250
0.5
Isink
0.0 Vcc=2.5V -0.5 -40
-300 -350 -400
-20
0
20
40
60
80
-450 -40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
13/36
TS615
Figure 38. Iout vs. temperature Open loop, VCC=2.5V, RL=25
300 250 200 150 100 50
Electrical Characteristics
Figure 41. Isource vs. output amplitude VCC=2.5V, open loop, no load
700
600
Isource
Iout (mA)
0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -40 -20 0 20 40 60 80
Isource (mA)
500
400
300
Isink
200
100
0 0.0
0.5
1.0
1.5
2.0
2.5
Temperature (C)
Vout (V)
Figure 39. Maximum output amplitude vs. load: AV=+4, Rfb=620, VCC=6V
12
Figure 42. Isink vs. output amplitude VCC=6V, open loop, no load
0
10
Vcc=6V
-100
-200
VOUT-MAX (VP-P)
8
Isink (mA)
Vcc=2.5V 0 50 100 150 200
-300
6
-400
4
-500
2
-600
0
-700 -6 -5 -4 -3 -2 -1 0
RLOAD ()
Vout (V)
Figure 40. Isink vs. output amplitude VCC=2.5V, open loop, no load
0
Figure 43. Isource vs. output amplitude VCC=6V, open loop, no load
700
-100
600
Isource (mA)
-200
500
Isink (mA)
-300
400
-400
300
-500
200
-600
100
-700 -2.5
0 -2.0 -1.5 -1.0 -0.5 0.0 0 1 2 3 4 5 6
Vout (V)
Vout (V)
14/36
Electrical Characteristics
Figure 44. Icc (power down) vs. temperature no load, open loop
200 150 100 50 Vcc=6V 0 Vcc=2.5V -50
TS615
ICC pdw (A)
-100 -150 -200 -40
-20
0
20
40
60
80
Temperature (C)
15/36
TS615
Safe Operating Area
4 Safe Operating Area
Figure 45 shows the safe operating zone for the TS615. The curve shows the input level vs. the input frequency--a characteristic curve which must be considered in order to ensure a good application design. In the dash-lined zone, the consumption increases, and this increased consumption could do damage to the chip if the temperature increases Figure 45. Safe operating area
100 90700 80
600
70
Delay (ns)
VINPUT (mVRMS)
60500 50
Vcc=+/-6V Ta=25C G=12dB RL=100
Av=4 Vcc=6V, Rfb=620, Load=25 Vcc=2.5V, Rfb=910, Load=10 IF Bw = 10Hz Smoothing=19.247MHz on 10ns/div scale
400
40 30300 20 10
SAFE OPERATING AREA
1M 10M 50M
200
300k
100
Frequency (Hz)
0 1M
10M
100M
Frequency (Hz)
16/36
Intermodulation Distortion Product
TS615
5 Intermodulation Distortion Product
The non-ideal output of the amplifier can be described by the following series, due to a non-linearity in the input-output amplitude transfer: V out = C o + C 1 V in + C 2 V in ... + C n V in
2 n
where the single-tone input is Vin=Asint, and C0 is the DC component, C1(Vin) is the fundamental, Cn is the amplitude of the harmonics of the output signal Vout. A one-frequency (one-tone) input signal contributes to a harmonic distortion. A two-tone input signal contributes to a harmonic distortion and an intermodulation product. This intermodulation product, or rather, the study of the intermodulation distortion of a two-tone input signal is the first step in characterizing the amplifiers capability for driving multi-tone signals. The two-tone input is equal to:
V in = A sin t + B sin t 1 2
giving:
V 2 n C C ( A sin t + B sin t ) + C ( A sin t + B sin t ) ... + C ( A sin t + B sin t ) out = 0 + 1 1 2 1 2 1 2 2 n
In this expression, we can extract distortion terms and intermodulations terms from a single sine wave: second-order intermodulation terms IM2 by the frequencies (1-2) and (1+2) with an amplitude of C2A2 and third-order intermodulation terms IM3 by the frequencies (21-2), (21+2), (-1+22) and (1+22) with an amplitude of (3/4)C3A3. We can measure the intermodulation product of the driver by using the driver as a mixer via a summing amplifier configuration. In doing this, the non-linearity problem of an external mixing device is avoided. Figure 46. Non-inverting summing amplifier
1k
49.9 Vin1
1k
11 10
+ _
+Vcc 13
49.9
1/2TS615
1:2
50
North Hills 0315PB
49.9 400
Rfb1
Vin2
Rg1
33 Vout diff. 100 33
Rfb2
2:1
50
North Hills 0315PB
1:2
50
North Hills 0315PB
400
Rg2
_
49.9
1k 1k
49.9
1/2TS615
+
-Vcc
49.9
17/36
TS615
Intermodulation Distortion Product
The following graphs show the IM2 and the IM3 of the amplifier in different configurations. The two-tone input signal is created by a Marconi 2026 multisource generator. Each tone has the same amplitude. The measurement was carried out using an HP3585A spectrum analyzer. Figure 47. Intermodulation vs. output amplitude: 370 kHz & 400 kHz, AV = +1.5, R fb = 1 k, RL = 14 diff., VCC = 2.5 V
-30
Figure 48. Intermodulation vs. output amplitude: 370 kHz & 400 kHz, AV = +1.5, Rfb = 1 k, R L = 28 diff., VCC = 2.5 V
-30
-40
-40
IM2 and IM3 (dBc)
-60
IM2 770kHz IM3 340kHz, 430kHz
IM2 30kHz
IM2 and IM3 (dBc)
-50
-50
-60 IM3 340kHz, 430kHz IM2 30kHz
IM2 770kHz
-70
-70
-80
-80
-90
IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8
-90
IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8
-100
-100
Differential Output Voltage (Vp-p)
Differential Output Voltage (Vp-p)
Figure 49. Intermodulation vs. gain: 370kHz &
400kHz, RL=20 diff., Vout=6Vpp, V CC=2.5V
-30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz
Figure 50. Intermodulation vs. Load: 370kHz & 400kHz,
AV=+1.5, Rfb=1k, Vout=6.5Vpp, VCC=2.5V
-30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-60 -70 -80 -90 -100 -110 1.0
IM2 30kHz
-60 -70 -80 -90 -100 -110
IM2 770kHz
IM2 30kHz
IM2 770kHz
1.5
2.0
2.5
3.0
3.5
4.0
0
20
40
60
80
100
120
140
160
180
200
Closed Loop Gain (Linear)
Differential Load ()
18/36
Intermodulation Distortion Product
Figure 51. Intermodulation vs. Output Amplitude:
100kHz & 110kHz, AV=+4, Rfb=620, RL=200 diff., VCC=6V
-30 -40 -50 IM3 90kHz, 120kHz IM3 310kHz IM3 320kHz -30 -40 -50 IM3 90kHz, 120kHz, 310kHz, 320kHz
TS615
Figure 52. Intermodulation vs. Output Amplitude:
100kHz & 110kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-60 -70 -80 -90 -100 -110 2 4 6
IM2 210kHz
-60 -70 -80 -90 -100 -110
IM2 210kHz
8
10
12
14
16
18
20
22
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
Differential Output Voltage (Vp-p)
Figure 53. Intermodulation vs. Frequency Range:
AV=+4, Rfb=620, RL=50 diff., Vout=16Vpp, VCC=6V
-30 -40 -50 IM2 770kHz
Figure 54. Intermodulation vs. Output Amplitude:
370kHz & 400kHz, AV=+4, Rfb=620, RL=50 diff., VCC=6V
-30 -40 IM2 30kHz IM3 1140kHz, 1170kHz IM3 340kHz, 430kHz IM2 770kHz
IM2 and IM3 (dBc)
-60 -70 -80 -90 -100 -110 0 2 4 6 IM3 340kHz, 430kHz
IM3 1140kHz, 1170kHz
IM2 and IM3 (dBc)
16 18 20 22
IM2 30kHz
-50 -60 -70 -80 -90 -100 -110 0 2 4 6 8
8
10
12
14
Differential Output Voltage (Vp-p)
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
19/36
TS615
Printed Circuit Board Layout Considerations
6 Printed Circuit Board Layout Considerations
In the ADSL frequency rangey, printed circuit board parasites can affect the closed-loop performance. The use of a proper ground plane on both sides of the PCB is necessary to provide low inductance and a low resistance common return. The most important factors affecting gain flatness and bandwidth are stray capacitance at the output and inverting input. To minimize capacitance, the space between signal lines and ground plane should be maximized. Feedback component connections must be as short as possible in order to decrease the associated inductance which affects high-frequency gain errors. It is very important to choose the smallest possible external components--for example, surface mounted devices (SMD)--in order to minimize the size of all DC and AC connections.
6.1 Thermal information
The TS615 is housed in an exposed-pad plastic package. As described in Figure 55, this package has a lead frame upon which the dice is mounted. This lead frame is exposed as a thermal pad on the underside of the package. The thermal contact is direct with the dice. This thermal path provides an excellent thermal performance. The thermal pad is electrically isolated from all pins in the package. It must be soldered to a copper area of the PCB underneath the package. Through these thermal paths within this copper area, heat can be conducted away from the package. The copper area must be connected to -VCC available on pin 4. Figure 55. Exposed-pad package
1
Figure 56. Evaluation board
DICE
Side View
Bottom View
DICE
Cross Section View
20/36
Printed Circuit Board Layout Considerations
Figure 57. Schematic diagram
TS615
J105
R101
Non-Inverting Amplifier
R106 J106 R107 R102 4
+
J106 R102
R107
4
+
1/2TS615
5
_
2 R116 R114
R118 R120
J110
1/2TS615
5
_
2 R116 R114
R118 R120
J110
R103
J107
R108 R115 10
R112
R111
Inverting Amplifier
R115 13 R117 R119 R121 J111 J108 R104 R109 10
_
J108 R104
R109
_
1/2TS615
11
+
R111
1/2TS615
+
13 R117
R119 R121
J111
11
J109 R105
R110 R113
Differential Amplifier
J106 R102 R107 4
+
1/2TS615
5
_
2 R116
R118 R120
J110
Non-Inverting Summing Amplifier
R101
R114 R111
R112
J105
R106 4
+
R115 10
_
J106 R102
R107
R113
1/2TS615
5
_
2 R116 R114
R118 R120
J110
1/2TS615
R117
R121
11
+
13
R119
J111 R111
J109 R105
R110 R113
Power Supply
+Vcc C105 100nF 100uF C102 C101 +Vcc 100nF 3 4 5
+
Power down J112
Differential Amplifier
J106 -Vcc R102 R107 4
+
R122
1/2TS615
5
_
2 R116 R114
R118 R120
J110
J101 +Vcc J102 GND J103 -Vcc 100nF C103 100uF C104
6 2 1 R111 Exposed-Pad -Vcc R112
1/2TS615
_
C106 100nF -Vcc -Vcc +Vcc C107 +Vcc 100nF 1 10
_
R115 10
_
1/2TS615
13 R117
R119 R121
J111
11 12 13 J109 R105 R110 R113
+
J104
2 3 11 -Vcc
1/2TS615
+
14
C108 100nF -Vcc
21/36
TS615
Figure 58. Component locations - top side
Printed Circuit Board Layout Considerations
Figure 59. Component locations - bottom side
Figure 60. Top side board layout
Figure 61. Bottom side board layout
22/36
Noise Measurements
TS615
7 Noise Measurements
The noise model is shown in Figure 62, where: l eN: input voltage noise of the amplifier
l iNn: negative input current noise of the amplifier l iNp: positive input current noise of the amplifier
Figure 62. Noise model
+
R3
iN+
_
TS615 eN
output HP3577 Input noise: 8nV/Hz
N3
iN-
N2
R1
R2
N1
The closed loop gain is: R fb A V = g = 1 + --------Rg The six noise sources are:
R2 V1 = eN x 1 + ------- R1 V2 = iNn x R2 R2 V3 = iNp x R3 x 1 + ------- R1 R2 V4 = - ------- x 4kTR1 R1 V5 =
4kTR2
R2 V6 = 1 + ------- 4kTR3 R1
We assume that the thermal noise of a resistance R is: 4 kTR DF where F is the specified bandwidth.
23/36
TS615
On a 1Hz bandwidth the thermal noise is reduced to
4kTR
Noise Measurements
where k is Boltzmann's constant, equals to 1374 x 10-23J/K. T is the temperature (K). The output noise eNo is calculated using the Superposition Theorem. However eNo is not the sum of all noise sources, but rather the square root of the sum of the square of each noise source, as shown in Equation 1.
eNo =
2 2 2 2 2 2 V1 + V2 + V3 + V4 + V 5 + V6
Equation 1
eNo
2
2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R 3 x g R2 2 R2 2 ... + ------- x 4kTR1 + 4kTR2 + 1 + ------- x 4kTR3 R1 R1
Equation 2
The input noise of the instrumentation must be extracted from the measured noise value. The real output noise value of the driver is:
2 2 ( Measured ) - ( instrumentation )
eNo =
Equation 3
The input noise is called the Equivalent Input Noise as it is not directly measured but is evaluated from the measurement of the output divided by the closed loop gain (eNo/g). After simplification of the fourth and the fifth term of Equation 2 we obtain:
2 2 2 2 2 2 2 2 R2 2 = eN x g + iNn x R2 + iNp x R3 x g ... + g x 4kTR2 + 1 + ------- x 4kTR 3 R1
eNo
Equation 4
7.1 Measurement of eN
If we assume a short-circuit on the non-inverting input (R3=0), Equation 4 becomes:
2 2 2 2 eN x g + iNn x R 2 + g x 4kTR2
eNo =
Equation 5
In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. On the other hand, the gain must be large enough:
l R1=10, R2=910, R3=0, Gain=92 l Equivalent Input Noise: 2.57nV/Hz l Input Voltage Noise: eN=2.5nV/Hz
24/36
Noise Measurements 7.2 Measurement of iNn
TS615
To measure the negative input current noise iNn, we set R3=0 and use Equation 5. This time the gain must be lower in order to decrease the thermal noise contribution:
l R1=100, R2=910, R3=0, gain=10.1 l Equivalent input noise: 3.40nV/Hz l Negative input current noise: iNn =21pA/Hz
7.3 Measurement of iNp
To extract iNp from Equation 3, a resistance R3 is connected to the non-inverting input. The value of R3 must be chosen in order to keep its thermal noise contribution as low as possible against the iNp contribution.
l R1=100, R2=910, R3=100, Gain=10.1 l Equivalent input noise: 3.93nV/Hz l Positive input current noise: iNp=15pA/Hz l Conditions: Frequency=100kHz, VCC =2.5V l Instrumentation: HP3585A Spectrum Analyzer (the input noise of the HP3585A is 8nV/Hz)
25/36
TS615
Power Supply Bypassing
8 Power Supply Bypassing
Correct power supply bypassing is very important for optimizing performance in high-frequency ranges. Bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency bypassing. A capacitor greater than 1F is necessary to minimize the distortion. For a better quality bypassing, a capacitor of 10nF is added using the same implementation conditions. Bypass capacitors must be incorporated for both the negative and the positive supply. Figure 63. Circuit for power supply bypassing
+VCC + 10nF
10F
+
TS615
-
10nF
10F + -VCC
8.1 Single power supply
The TS615 can operate with power supplies ranging from 12V to 5V. The power supply can either be single (12V or 5V referenced to ground), or dual (such as 6V and 2.5V). In the event that a single supply system is used, new biasing is necessary to assume a positive output dynamic range between 0V and +VCC supply rails. Considering the values of VOH and VOL, the amplifier will provide an output dynamic from +0.5V to 10.6V on 25 load for a 12V supply and from 0.45V to 3.8V on 10 load for a 5V supply. The amplifier must be biased with a mid-supply (nominally +VCC/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply, such as a virtual ground using an operational amplifier or a two-resistance divider (which is the cheapest solution). A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (30A max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances of 2.2k can be used in the case of a 12V power supply and two resistances of 820 can be used in the case of a 5V power supply. The input provides a high-pass filter with a break frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input signal, and to fix it at +VCC/2.
26/36
Power Supply Bypassing
Figure 64 shows a schematic of a 5V single power supply configuration Figure 64. Circuit for +5V single supply
+5V 10F IN +5V R1 820 Rfb R2 820 + 1F 10nF RG
910
TS615
+
Rin 1k 1/2 TS615
100F Rs
OUT Rload
_
+
CG
8.2 Channel separation and crosstalk
Figure 65 shows an example of crosstalk from one amplifier to a second amplifier. This phenomenon, accentuated at high frequencies, is unavoidable and intrinsic to the circuit itself. Nevertheless, the PCB layout also has an effect on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes and power supply bypassing are the most significant factors. Figure 65. Crosstalk vs. frequency: AV=+4, Rfb =620, VCC=6V, Vout=2Vp
-50 -60 -70 -80 -90 -100 -110 -120 -130 10k
CrossTalk (dB)
100k
1M
10M
Frequency (Hz)
27/36
TS615
Power Down Mode Behavior
9 Power Down Mode Behavior
Please note that the short-circuited output in power-down mode is referenced to (-VCC). No problems appear when used in differential mode. Nevertheless, when used in single-ended mode on a load referenced to GND, the (-VCC) level contributes to a current consumption through the load. Figure 66. Equivalent schematic
Vcc +
4
+ _
. .
3
POWER DOWN pin6
A1
5
.. .
-Vcc -Vcc
2 Ouput 1
Rpdw
1
Vcc Vcc 14 11
+ _ A2
10
. .
.. .
Rpdw
13 Ouput 2
12
Vcc +
POWER DOWN pin6
As shown in Figure 66, the interest of having an output short-circuit in power-down mode is to keep the best impedance matching between the system and the twisted pair telephone line when the modem is in sleep mode. By doing this, the modem can be woken up with a signal from the line without any damage
28/36
Power Down Mode Behavior
TS615
to this signal. This concept is particularly intended for the ADSL-over-voice modems, where the modem in sleep mode, and must be woken up by the phone call. Figure 67. Matching in sleep mode
Consumption=80A
Matching 12.5 Transformer
TS615
1:2
5 max. 12.5 25
Line (100)
POWER DOWN
The system can be waked-up from the line
Figure 68. Standby mode. Time On>Off
0
Figure 69. Standby mode. Time Off>On
1
Enabled Output
-1
Vout
0
-2
Vout
Disabled Output
- 1
(Volts)
(Volts)
Enabled Output
- 2 - 3
-3
-4
Disabled Output
- 4
-5
Vpdw
- 5 - 6
Vpdw
-6 0 10 20 30 40 50
0
1
2
3
4
5
Time (s)
Time (s)
Figure 70. Standby mode. input/output isolation vs. frequency: AV=+4, Rfb =620,
VCC=6V, Vout=3Vp
0 -10 -20 -30
Isolation (dB)
-40 -50 -60 -70 -80 -90 -100 -110 -120 -130 10k 100k 1M 10M
Frequency (Hz)
29/36
TS615
Choosing the Feedback Circuit
10 Choosing the Feedback Circuit
As described on Figure 72 on page 31, the TS615 requires a 620 feedback resistor to optimize the bandwidth with a gain of 12 dB for a 12 V power supply. Nevertheless, due to production test constraints, the TS615 is tested with the same feedback resistor for 12 V and 5 V power supplies (910). Table 6. Closed-loop gain - feedback components
VCC (V) Gain +1 +2 +4 Rfb () 750 680 620 510 680 680 620 510 1.1k 1k 910 680 1k 1k 910 680
6
+8 -1 -2 -4 -8 +1 +2 +4
2.5
+8 -1 -2 -4 -8
10.1 The bias of an inverting amplifier
A resistance is necessary to achieve a good input biasing, such as resistance R, shown in Figure 71. The magnitude of this resistance is calculated by assuming the negative and positive input bias current. The aim is to compensate for the offset bias current, which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R will be: R = Rin // Rfb Figure 71. Compensation of the input bias current
Rfb
Ib-
Rin
_
Vcc+ Output TS615
+
Ib+ R Vcc-
Load
30/36
Choosing the Feedback Circuit 10.2 Active filtering
Figure 72. Low-pass active filtering. Sallen-Key
C1
TS615
R1 IN
R2 C2
+
OUT TS615
_
25
RG
Rfb 910
From the resistors Rfb and RG we can directly calculate the gain of the filter in a classical, non-inverting amplification configuration:
R fb A V = g = 1 + --------Rg
We assume the following expression as the response of the system:
T Vout g j = ------------------- = --------------------------------------------j Vin 2 j j ( j ) 1 + 2 ------ + ------------c 2 c
The cutoff frequency is not gain-dependent and so becomes:
1 c = ------------------------------------R1R2C 1C2
The damping factor is calculated by the following expression:
1 = -- c ( C1 R 1 + C1 R 2 + C2 R 1 - C1 R 1 g ) 2
The higher the gain the more sensitive the damping factor is. When the gain is higher than 1, it is preferable to use some very stable resistor and capacitor values. In the case of R1=R2:
R fb 2C - C --------2 1R g = ----------------------------------2CC 12
31/36
TS615
Increasing the Line Level Using Active Impedance Matching
11 Increasing the Line Level Using Active Impedance Matching
With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation an active matching impedance can be used. With this technique, it is possible to maintain good impedance matching with an amplitude on the load higher than half of the output driver amplitude. This concept is shown in Figure 73 for a differential line. Figure 73. TS615 as a differential line driver with active impedance matching
1 100n + Vcc+ 1k _ Vcc+ GND Rs1 10n
Vi
1/2
R2 R3 Vcc/2
1/2
Vo Vo
1:n
Hybrid & Transformer
R1
RL Vo
100
R1
R5
Vi
1k
10
100n
GND
+ _
R4 Vcc+
GND
Vo
Rs2
100n
Component calculation
Let us consider the equivalent circuit for a single-ended configuration, as shown in Figure 74. Figure 74. Single-ended equivalent circuit
+
Rs1 Vi
_
R2
Vo Vo
-1
R3 1/2R1 1/2RL
32/36
Increasing the Line Level Using Active Impedance Matching
TS615
First let's consider the unloaded system. We can assume that the currents through R1, R2 and R3 are respectively:
2Vi ( Vi - Vo ) ( Vi + Vo ) -------- , -------------------------- and -----------------------R2 R3 R1
As Vo equals Vo without load, the gain in this case becomes:
2R2 R2 1 + ----------- + ------Vo ( noload ) R1 R3 G = -------------------------------- = -----------------------------------R2 Vi 1 - ------R3
The gain, for the loaded system is given by Equation 6:
2R2 R2 1 + ----------- + ------Vo ( withload ) R1 R3 1 GL = ------------------------------------- = -- -----------------------------------R2 Vi 2 1 - ------R3
Equation 6
The system shown in Figure 74 is an ideal generator with a synthesized impedance acting as the internal impedance of the system. From this, the output voltage becomes: Vo = ( ViG ) - ( R o Iou t ) where Ro is the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as:
2R2 R2 Vi 1 + ----------- + ------- R1 R3 Rs1Iout Vo = ----------------------------------------------- - ---------------------R2 R2 1 - ------1 - ------R3 R3
Equation 7
Equation 8
By identification of both Equation 7 and Equation 8, the synthesized impedance is, with Rs1=Rs2=Rs:
Rs Ro = ----------------R2 1 - ------R3
Equation 9
Figure 75: Equivalent schematic. Ro is the synthesized impedance
Ro
Iout
Vi.Gi
1/2RL
33/36
TS615
Increasing the Line Level Using Active Impedance Matching
Let us write Vo=kVo, where k is the matching factor varying between 1 and 2. If we assume that the current through R3 is negligible, we can calculate the output resistance, Ro:
kV oRL Ro = ----------------------------RL + 2R s1
After choosing the k factor, Rs will equal to 1/2RL(k-1). For a good impedance matching we assume that:
1 Ro = -- RL 2
Equation 10
From Equation 9 and Equation 10, we derive:
R2 ------- = 1 - 2Rs ---------R3 RL
Equation 11
By fixing an arbitrary value of R2, Equation 11 becomes:
R2 R3 = -------------------2Rs 1 - ---------RL
Finally, the values of R2 and R3 allow us to extract R1 from Equation 6, so that:
2R2 R1 = --------------------------------------------------------- 1 - R2 GL - 1 - R 2 2 ------- ------ R3 R3
Equation 12
with GL the required gain. Table 7. Components calculation for impedance matching implementation GL (gain for the loaded system) R1 R2 (=R4) R3 (=R5) Rs Load viewed by each driver
GL is fixed for the application requirements GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Arbitrarily fixed R2/(1-Rs/0.5RL) 0.5RL(k-1) kRL/2
34/36
Package Mechanical Data
TS615
12 Package Mechanical Data
TSSOP14 EXPOSED PAD MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D D1 E E1 E2 e K L 0 0.45 0.60 0.8 0.19 0.09 4.9 1.7 6.2 4.3 1.5 0.65 8 0.75 0 0.018 0.024 6.4 4.4 6.6 4.5 5 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 0.031 0.007 0.004 0.193 0.067 0.244 0.169 0.059 0.0256 8 0.030 0.252 0.173 0.260 0.177 0.197 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 inch
7256412B
35/36
Revision History
TS615
13 Revision History
Date 01 Nov 2002 Revision 1 First Release General grammatical and formatting changes to entire document. Specific changes: * * * * Moved note in Table 3 to Chapter 10: Choosing the Feedback Circuit on page 30. Added Chapter 4: Safe Operating Area on page 16. Simplified mathematical representations of the intermodulation product in Chapter 5: Intermodulation Distortion Product on page 17. In Chapter 6: Printed Circuit Board Layout Considerations on page 20, change from "The copper area can be connected to (-Vcc) available on pin 4." to "The copper area must be connected to -Vcc available on pin 4.". In Section 10.1: The bias of an inverting amplifier on page 30, change of section title, and correction of referred figure to Figure 71. Description of Changes
03 Dec 2004
2
*
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Repubic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
36/36

▲Up To Search▲

Price & Availability of TS61504

	To Download TS61504 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .